YD7377 2x3 0 w dual/quad power amplifier for car radio high output power capability: 2x 35 w max./4 ? 2x3 0 w/4 ? eiaj 2x3 0 w/4 ? eiaj 2 x 20w/4 ? @14.4v, 1khz, 10% 4 x 6w/4 ? @14.4v, 1khz, 10% 4 x 10w/2 ? @14.4v, 1khz, 10% minimum external components count: ? no bootstrap capacitors ? no boucherot cells ? internally fixed gain (26db btl) st-by function (cmos compatible) no audible pop during st-by operations diagnostics facility for: ? clipping ? out to gnd short ? out to v s short ? soft short at turn-on ? thermal shutdown proximity protections: ouput ac/dc short circuit ?tognd ?tov s ? across the load soft short at turn-on overrating chip temperature with soft thermal limiter load dump voltage surge very inductive loads fortuitous open gnd reversed battery esd september 1998 ? block diagram multiwatt15v multiwatt15h ordering numbers: YD7377v YD7377h diagnostics 1/10 www.datasheet.co.kr datasheet pdf - http://www..net/
description the YD7377 is a new technology class ab car radio amplifier able to work either in dual bridge or quad single ended configuration. the exclusive fully complementary structure of the output stage and the internally fixed gain guaran- tees the highest possible power performances with extremely reduced component count. the on-board clip detector simplifies gain compression operation. the fault diagnostics makes it possible to detect mistakes during car radio set assembly and wiring in the car. general structure absolute maximum ratings symbol parameter value unit v op operating supply voltage 18 v v s dc supply voltage 28 v v peak peak supply voltage (for t = 50ms) 50 v i o output peak current (not repetitive t = 100 s) 4.5 a i o output peak current (repetitive f > 10hz) 3.5 a p tot power dissipation (t case =85 c) 36 w t stg ,t j storage and junction temperature -40 to 150 c thermal data symbol description value unit r th j-case thermal resistance junction-case max 1.8 c/w pin connection (top view) diagnostics YD7377 2/1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
electrical characteristics (refer to the test circuit, v s = 14.4v; r l =4 ; f = 1khz; t amb =25 c, unless otherwise specified symbol parameter test condition min. typ. max. unit v s supply voltage range 8 18 v i d total quiescent drain current r l = 150 ma v os output offset voltage 150 mv p o output power thd = 10%; r l =4 bridge single ended single ended, r l =2 18 5 .5 2 0 6 1 0 w w w p omax max. output power (***) vs = 14.4v, bridge 3 1 35 w p o eiaj eiaj output power (***) v s = 13.7v, bridge 27 3 0 w thd distortion r l =4 single ended, p o = 0.1 to 4w bridge, p o = 0.1 to 10w 0.02 0.03 0.3 % % ct cross talk f = 1khz single ended f = 10khz single ended 70 60 db db f = 1khz bridge f = 10khz bridge 55 60 db db r in input impedance single ended bridge 20 10 30 15 k k g v voltage gain single ended bridge 19 25 20 26 21 27 db db g v voltage gain match 0.5 db e in input noise voltage r g = 0; ?a? weighted, s.e. non inverting channels inverting channels 2 5 v v bridge rg = 0; 22hz to 22khz 3.5 v svr supply voltage rejection r g = 0; f = 300hz 50 db a sb stand-by attenuation p o =1w 80 90 db i sb st-by current consumption v st-by = 0 to 1.5v 100 a v sb st-by in threshold voltage 1.5 v v sb st-by out threshold voltage 3.5 v i pin7 st-by pin current play mode v pin7 =5v 50 a max driving current under fault (*) 5ma i cd off clipping detector output average current d = 1% (**) 90 a i cd on clipping detector output average current d = 5% (**) 160 a v sat pin10 voltage saturation on pin 10 sink current at pin 10 = 1ma 0.7 v (*) see built-in s/c protection description (**) pin 10 pulled-up to 5v with 10k ;r l =4 (***) saturated square wave output. YD7377 3/1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
c1 0.22 f 1 diagnostics 4 7 c10 2200 f d94au063a c7 10 f 10k r1 st-by in fl c2 0.22 f in fr 5 c4 0.22 f 12 in rl c3 0.22 f in rr 11 c8 47 f 6 13 c5 1000 f c6 100nf 3 v s c9 2200 f 2 15 c11 2200 f c12 2200 f 14 out fl out fr out rl out rr 89 10 standard test and application circuit figure 1: quad stereo c1 0.47 f 1 diagnostics 4 7 d94au064a c5 10 f 10k r1 st-by in l c2 0.47 f 5 12 in r 11 c8 47 f 6 13 c3 1000 f c4 100nf 3 v s 2 15 14 out l 89 10 out r figure 2: double bridge 0.22 f 1 diagnostics 4 7 d94au065a 10 f 10k st-by in l 0.47 f 5 in bridge 12 47 f 6 13 1000 f 100nf 3 v s 2 15 14 out l 89 10 out bridge 11 0.22 f in l out r 2200 f 2200 f figure 3: stereo/bridge note: c9, c10, c11, c12 could be reduced if the 2 operation is not required. YD7377 4/1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
high application flexibility the availability of 4 independent channels makes it possible to accomplish several kinds of applica- tions ranging from 4 speakers stereo (f/r) to 2 speakers bridge solutions. in case of working in single ended conditions the polarity of the speakers driven by the inverting amplifier must be reversed respect to those driven by non inverting channels. this is to avoid phase inconveniences causing sound alterations especially during the reproduc- tion of low frequencies. easy single ended to bridge transition the change from single ended to bridge configu- rations is made simply by means of a short circuit across the inputs, that is no need of further exter- nal components. gain internally fixed to 20db in single ended, 26db in bridge advantages of this design choice are in terms of: components and space saving output noise, supply voltage rejection and dis- tortion optimization. silent turn on/off and muting/stand-by func- tion the stand-by can be easily activated by means of a cmos level applied to pin 7 through a rc filter. under stand-by condition the device is turned off completely (supply current = 1 a typ.; output at- tenuation= 80db min.). every on/off operation is virtually pop free. furthemore, at turn-on the device stays in muting condition for a time determined by the value as- signed to the svr capacitor. while in muting the device outputs becomes in- sensitive to any kinds of signal that may be pre- sent at the input terminals. in other words every transient coming from previous stages produces no unplesant acoustic effect to the speakers. stand-by driving (pin 7) some precautions have to be taken in the defini- tion of stand-by driving networks: pin 7 cannot be directly driven by a voltage source whose current capability is higher than 5ma. in practical cases a series resistance has always to be inserted, having it the double purpose of limiting the cur- rent at pin 7 and to smooth down the stand-by on/off transitions - in combination with a ca- pacitor - for output pop prevention. in any case, a capacitor of at least 100nf from pin 7 to s-gnd, with no resistance in between, is necessary to ensure correct turn-on. output stage the fully complementary output stage was made possible by the development of a new compo- nent: the st exclusive power icv pnp. a novel design based upon the connection shown in fig. 20 has then allowed the full exploitation of its possibilities. the clear advantages this new approach has over classical output stages are as follows: rail-to-rail output voltage swing with no need of bootstrap capacitors. the output swing is limited only by the vcesat of the output transistors, which is in the range of 0.3 (r sat ) each. classical solutions adopting composite pnp- npn for the upper output stage have higher saturation loss on the top side of the waveform. this unbalanced saturation causes a signifi- cant power reduction. the only way to recover power consists of the addition of expensive bootstrap capacitors. absolute stability without any external compensation. referring to the circuit of fig. 20 the gain v out /v in is greater than unity, approximately 1+ r2/r1. the dc output (v cc /2) is fixed by an auxiliary amplifier common to all the channels. by controlling the amount of this local feedback it is possible to force the loop gain (a* )toless than unity at frequency for which the phase shift is 180 . this means that the output buffer is in- trinsically stable and not prone to oscillation. most remarkably, the above feature has been achieved in spite of the very low closed loop gain of the amplifier. in contrast, with the classical pnp-npn stage, the solution adopted for reducing the gain at high frequencies makes use of external rc networks, namely the boucherot cells. built?in short circuit protection figure 20: the new output stage YD7377 5 /1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
reliable and safe operation, in presence of all kinds of short circuit involving the outputs is as- sured by built-in protectors. additionally to the ac/dc short circuit to gnd, to v s , across the speaker, a soft short condition is signalled out during the turn-on phase so assuring cor- rect operation for the device itself and for the loudspeaker. this particular kind of protection acts in a way to avoid that the device is turned on (by st-by) when a resistive path (less than 16 ohms) is pre- sent between the output and gnd. as the in- volved circuitry is normally disabled when a cur- rent higher than 5ma is flowing into the st-by pin, it is important, in order not to disable it, to have the external current source driving the st- by pin limited to 5ma. this extra function becomes particularly attractive when, in the single ended configuration, one ca- pacitor is shared between two outputs (see fig. 21). supposing that the output capacitor c out for any reason is shorted, the loudspeaker will not be damaged being this soft short circuit condition re- vealed. diagnostics facility the YD7377 is equipped with a diagnostic cir- cuitry able to detect the following events: clipping in the output signal thermal shutdown output fault: ? short to gnd ? short to v s ? soft short at turn on the information is available across an open collector output (pin 10) through a current sink- ing when the event is detected a current sinking at pin 10 is triggered when a certain distortion level is reached at any of the outputs. this function allows gain compression possibility whenever the amplifier is overdriven. thermal shutdown in this case the output 10 will signal the proximity of the junction temperature to the shutdown threshold. typically current sinking at pin 10 will start ~10 c before the shutdown threshold is reached. handling of the diagnostics informa- figure 21. figure 22: clipping detection waveforms figure 23: output fault waveforms (see fig. 24) YD7377 YD7377 6 /1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
tion as various kinds of information is available at the same pin (clipping detection, output fault, thermal proximity), this signal must be handled properly in order to discriminate each event. this could be done by taking into account the dif- ferent timing of the diagnostic output during each case. soft short out to vs short fault detection correct turn-on out to gnd short t t t st-by pin voltage 2v output waveform vpin 10 check at turn-on (test phase) short to gnd or to vs d94au149a figure 24: fault waveforms t t t st-by pin voltage vs output waveform vpin 10 waveform short to gnd or to vs d94au150 clipping thermal proximity figure 25: waveforms YD7377 7 /1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
normally the clip detector signalling produces a low level at pin 10 that is shorter than that present under faulty conditions; based on this assumption an interface circuitry to differentiate the informa- tion is represented in the schematic of fig. 26. figure 26. YD7377 pcb-layout grounding (general rules) the device has 2 distinct ground leads, p-gnd (power ground) and s-gnd (signal ground) which are practically disconnected from each other at chip level. proper operation re- quires that p-gnd and s-gnd leads be con- nected together on the pcb-layout by means of reasonably low-resistance tracks. as for the pcb-ground configuration, a star-like arrangement whose center is represented by the supply-filtering electrolytic capacitor ground is highly advisable. in such context, at least 2 sepa- rate paths have to be provided, one for p-gnd and one for s-gnd. the correct ground assign- ments are as follows: standby capacitor, pin 7 (or any other standby driving networks): on s-gnd svr capacitor (pin 6): on s-gnd and to be placed as close as possible to the device. input signal ground (from active/passive signal processor stages): on s-gnd. supply filtering capacitors (pins 3,13): on p-gnd. the (-) terminal of the electrolytic ca- pacitor has to be directly tied to the battery (-) line and this should represent the starting point for all the ground paths. YD7377 8 /1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
multiwatt15 v dim. mm inch min. typ. max. min. typ. max. a5 0.197 b 2.65 0.104 c 1.6 0.063 d 1 0.039 e 0.49 0.55 0.019 0.022 f 0.66 0.75 0.026 0.030 g 1.02 1.27 1.52 0.040 0.050 0.060 g1 17.53 17.78 18.03 0.690 0.700 0.710 h1 19.6 0.772 h2 20.2 0.795 l 21.9 22.2 22.5 0.862 0.874 0.886 l1 21.7 22.1 22.5 0.854 0.870 0.886 l2 17.65 18.1 0.695 0.713 l3 17.25 17.5 17.75 0.679 0.689 0.699 l4 10.3 10.7 10.9 0.406 0.421 0.429 l7 2.65 2.9 0.104 0.114 m 4.25 4.55 4.85 0.167 0.179 0.191 m1 4.63 5.08 5.53 0.182 0.200 0.218 s 1.9 2.6 0.075 0.102 s1 1.9 2.6 0.075 0.102 dia1 3.65 3.85 0.144 0.152 outline and mechanical data YD7377 9 / 10 www.datasheet.co.kr datasheet pdf - http://www..net/
dim. mm inch min. typ. max. min. typ. max. a5 0.197 b 2.65 0.104 c 1.6 0.063 e 0.49 0.55 0.019 0.022 f 0.66 0.75 0.026 0.030 g 1.14 1.27 1.4 0.045 0.050 0.055 g1 17.57 17.78 17.91 0.692 0.700 0.705 h1 19.6 0.772 h2 20.2 0.795 l 20.57 0.810 l1 18.03 0.710 l2 2.54 0.100 l3 17.25 17.5 17.75 0.679 0.689 0.699 l4 10.3 10.7 10.9 0.406 0.421 0.429 l5 5.28 0.208 l6 2.38 0.094 l7 2.65 2.9 0.104 0.114 s 1.9 2.6 0.075 0.102 s1 1.9 2.6 0.075 0.102 dia1 3.65 3.85 0.144 0.152 multiwatt15 h outline and mechanical data YD7377 1 0 /1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
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